import sys
sys.path.append("..")
import pyrtl
from  pyrtl import GPUSim
import or1200_definitions

dw = or1200_definitions.OR1200_OPERAND_WIDTH
aw = or1200_definitions.OR1200_OPERAND_WIDTH

class Or1200sb(object):
    def __init__(self):
        # self.clk = pyrtl.Input(bitwidth=1, name='clk')
        self.rst = pyrtl.Input(bitwidth=1, name='rst')

        # Internal RISC bus (DC<->SB)
        self.dcsb_dat_i = pyrtl.Input(bitwidth=dw, name='dcsb_dat_i')     # input data bus
        self.dcsb_adr_i = pyrtl.Input(bitwidth=aw, name='dcsb_adr_i')     # address bus
        self.dcsb_cyc_i = pyrtl.Input(bitwidth=1, name='dcsb_cyc_i')     # WB cycle
        self.dcsb_stb_i = pyrtl.Input(bitwidth=1, name='dcsb_stb_i')     # WB strobe
        self.dcsb_we_i  = pyrtl.Input(bitwidth=1, name='dcsb_we_i ')     # WB write enable
        self.dcsb_cab_i = pyrtl.Input(bitwidth=1, name='dcsb_cab_i')     # CAB input
        self.dcsb_sel_i = pyrtl.Input(bitwidth=4, name='dcsb_sel_i')     # byte selects
        self.dcsb_dat_o = pyrtl.Output(bitwidth=dw, name='dcsb_dat_o')     # output data bus
        self.dcsb_ack_o = pyrtl.Output(bitwidth=1, name='dcsb_ack_o')     # ack output
        self.dcsb_err_o = pyrtl.Output(bitwidth=1, name='dcsb_err_o')     # err output

        # BIU bus
        self.sbbiu_dat_o = pyrtl.Output(bitwidth=dw, name='sbbiu_dat_o')     # output data bu
        self.sbbiu_adr_o = pyrtl.Output(bitwidth=aw, name='sbbiu_adr_o')     # address bus
        self.sbbiu_cyc_o = pyrtl.Output(bitwidth=1, name='sbbiu_cyc_o')     # WB cycle
        self.sbbiu_stb_o = pyrtl.Output(bitwidth=1, name='sbbiu_stb_o')     # WB strobe
        self.sbbiu_we_o  = pyrtl.Output(bitwidth=1, name='sbbiu_we_o ')     # WB write enabl
        self.sbbiu_cab_o = pyrtl.Output(bitwidth=1, name='sbbiu_cab_o')     # CAB input
        self.sbbiu_sel_o = pyrtl.Output(bitwidth=4, name='sbbiu_sel_o')     # byte selects
        self.sbbiu_dat_i = pyrtl.Input(bitwidth=dw, name='sbbiu_dat_i')     # input data bus
        self.sbbiu_ack_i = pyrtl.Input(bitwidth=1, name='sbbiu_ack_i')     # ack output
        self.sbbiu_err_i = pyrtl.Input(bitwidth=1, name='sbbiu_err_i')     # err output

        # OR1200_SB_IMPLEMENTED is False
        self.sbbiu_dat_o = self.dcsb_dat_i
        self.sbbiu_adr_o = self.dcsb_adr_i
        self.sbbiu_cyc_o = self.dcsb_cyc_i
        self.sbbiu_stb_o = self.dcsb_stb_i
        self.sbbiu_we_o  = self.dcsb_we_i
        self.sbbiu_cab_o = self.dcsb_cab_i
        self.sbbiu_sel_o = self.dcsb_sel_i
        self.dcsb_dat_o  = self.sbbiu_dat_i
        self.dcsb_ack_o  = self.sbbiu_ack_i
        self.dcsb_err_o  = self.sbbiu_err_i

if __name__ == '__main__':
    or1200sb = Or1200sb()
    sim = pyrtl.GPUSim_now.GPUSim(65536)
    sim.create_dll('sb.cu')
    # print(pyrtl.working_block())

